EE2000 - Logic Circuit Design | ||||||||||
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| * The offering term is subject to change without prior notice | ||||||||||
Course Aims | ||||||||||
The aim is to provide students with an understanding of the concepts and design of logic circuits, including (i) various devices, techniques for analyzing and designing combinational circuits and sequential circuits, circuit design and implementation techniques, and (ii) Hardware Description Language (HDL) modelling and synthesis of combinational and synchronous sequential circuit, circuit implementation with FPGA devices.? The electrical characteristics of selected logic families are also covered. | ||||||||||
Assessment (Indicative only, please check the detailed course information) | ||||||||||
Continuous Assessment: 50% | ||||||||||
Examination: 50% | ||||||||||
Examination Duration: 2 hours | ||||||||||
Remark: To pass the course, students are required to achieve at least 30% in course work and 30% in the examination. Also, 75% laboratory attendance rate must be obtained. | ||||||||||
Detailed Course Information | ||||||||||
| EE2000.pdf | ||||||||||
